The photolithography process runs through multiple repeated pattern transfer stages throughout the entire chip manufacturing process and plays a decisive role in the miniaturization and high performance of integrated circuits. As semiconductor manufacturing processes evolve, the requirements for photolithography resolution, alignment accuracy, and reliability continue to rise, and photolithography technology will also keep evolving to support more advanced processes and more complex device designs.
I. The Role of Photolithography in Integrated Circuit Manufacturing
In the manufacturing of integrated circuits, it is often necessary to repeatedly “transfer” design patterns onto a silicon substrate (wafer), and photolithography is the key step that undertakes this core task. Through photolithography, we can accurately “expose and develop” the circuit patterns on a mask (also known as a photomask or reticle) onto the photoresist-coated surface of the silicon wafer using photosensitive materials (photoresist) and light exposure, and then, through subsequent processes like etching, finally “carve” the pattern into the silicon substrate or metal layer.
Since the photolithography area uses yellow lighting that is non-sensitive to photoresist, this area is also referred to as the “yellow room.” This not only prevents stray light from causing unintended exposure to the photoresist but also allows engineers to operate in a relatively safe environment without needing to work in complete darkness.
II. Photoresist and Exposure Methods
✅ Types of Photoresist
Positive Photoresist
The areas exposed to light (or specific wavelengths) become more soluble in developer, so the exposed regions are “washed away” by the developer, while the unexposed areas remain.
Advantages: Enables high-resolution nanometer-scale linewidths and is widely used in advanced processes.
Typical applications: 0.35 µm, 0.25 µm, and even 14 nm, 7 nm and smaller nodes.
Negative Photoresist
The areas exposed to light undergo cross-linking reactions, making them more resistant to the developer, so the exposed regions remain on the wafer while the unexposed areas are washed away.
Advantages: Offers stable processing and higher etch resistance for certain large-area patterns or specific processes.
Limitations: Lower resolution compared to positive resists; more often used where linewidth requirements are less stringent.
✅ Wavelength Sensitivity of Photoresists
The formulation of photoresist is highly dependent on the wavelength of the light source:
- i-line (365nm) photoresists typically use a DNQ-novolac resin system.
- 193nm (ArF) photoresists require new polymer and sensitizer components matched to this wavelength; i-line formulations are no longer suitable.
- Advanced nodes (e.g., EUV 13.5nm) require specially designed resist materials.
✅ “Positive Tone Resist with Negative Development” in Advanced Processes
For 16nm/14nm and below, “positive tone resist with negative development” (PTD) can be used for vias and metal layers:
Under normal conditions, a positive resist has the exposed portion washed away, but by using a negative developer, the unexposed parts are washed away instead, leaving the exposed area.
Advantage: Enhances imaging contrast in fine trench patterns, which benefits critical layers such as high aspect ratio vias.
III. Main Steps in the Photolithography Process
✅ Bottom Layer Preparation
Cleaning and Dehydration
Removes contaminants like particles and metal ions and eliminates moisture from the substrate surface. This enhances adhesion between the photoresist and the substrate, reducing defects or pattern deformation caused by resist peeling during lithography.
✅ Photoresist Coating and Soft Bake
Spin Coating
The wafer is placed in a spin coater, where the liquid photoresist is spread uniformly via high-speed rotation. The spin speed, resist viscosity, and spin time determine the resist thickness and uniformity.
Soft Bake
A low-temperature bake (typically 90–120°C, depending on the resist type) removes solvents from the resist, improves adhesion to the substrate, enhances film uniformity, and sets the foundation for successful exposure and development.
✅ Alignment, Exposure, and Post-Exposure Bake
Alignment
Aligns the mask pattern in the photolithography machine with the pre-existing pattern on the wafer to ensure vertical and electrical connectivity between layers. Alignment accuracy is a critical metric for lithography quality and determines whether the final device meets dimensional and performance expectations.
Exposure
A light source of specific wavelength is used to expose the photoresist, triggering a photochemical reaction. Different photolithography processes, such as 193nm ArF and 365nm i-line, have unique strengths and limitations and require matching equipment and resists. The photolithography machine is the most expensive and crucial tool in the entire production line, and its capabilities often determine whether the line can support advanced nodes.
Post-Exposure Bake (PEB)
For deep ultraviolet (DUV) resists, PEB helps remove protective groups and improve resist solubility in the developer. For traditional i-line resists, PEB reduces standing wave effects in the resist and improves the smoothness and stability of pattern sidewalls.
✅ Development and Hard Bake
Development
The exposed (and now soluble, in the case of positive resist) areas are removed using a developer, revealing the mask pattern. Developer temperature, time, concentration, and rinse conditions all significantly impact linewidth control and pattern integrity.
Hard Bake
Also known as post-develop bake, it further removes residual solvents and moisture from the resist, hardening the resist film and enhancing its resistance to harsh environments (e.g., plasma) during subsequent etching steps.
✅ Post-Development Inspection
Automated optical inspection (or image recognition systems) detect defects in the developed pattern. If the number of defects exceeds acceptable limits, the wafer is deemed defective and typically scrapped or reworked. Lithography is one of the few steps that can be “reworked” by removing the resist and reapplying and re-exposing it, thus reducing scrap loss.
IV. Key Photolithography Metrics
Resolution
The smallest linewidth/spacing that can be clearly imaged, a core indicator of lithography limits. Shorter wavelengths (e.g., 193nm, 13.5nm) combined with high numerical aperture (NA) lenses enable higher resolution.
Sensitivity
Indicates how much light energy is needed to trigger the chemical change in the photoresist. Low sensitivity requires longer exposure or higher doses, increasing heat, material damage, or reducing throughput. High sensitivity may reduce process stability due to a narrower process window.
Alignment Accuracy
Reflects the overlay deviation between different pattern layers. As linewidths shrink, excessive overlay errors can degrade or even disable device functionality.
Defect Rate
Measures issues like pinholes, stains, or pattern deformation during exposure/development. Defect rate directly impacts yield and cost.
V. Analogy and Intuitive Understanding
“Film Photography” Analogy:
Photolithography is like exposing and developing a piece of photographic film coated with photosensitive material. The mask is like the negative, and the photoresist-coated wafer surface is like the film emulsion. The exposure step “captures” the pattern, and the development step reveals it. The key difference is that semiconductor manufacturing demands extremely high precision in dimensions and tightly controlled chemical and physical conditions.
“Wash and Rework” Advantage:
In most semiconductor processes, errors are difficult to recover from. However, photolithography allows rework by washing off the photoresist and repeating the coating and exposure steps, making it relatively unique.
VI. Conclusion and Outlook
Conclusion:
Photolithography is the core step in transferring circuit designs to the wafer surface. From substrate cleaning, photoresist coating, alignment and exposure, development to hard bake and inspection, each step has strict parameter control and quality requirements. Photoresist selection, light source wavelength matching, exposure tool performance, and alignment precision all deeply affect final linewidth and yield.
Outlook:
As processes advance toward 7nm, 5nm, 3nm, and beyond, traditional DUV (ArF) lithography is increasingly supported by multi-patterning or hybrid approaches with EUV. Next-generation lithography not only involves shorter wavelengths (EUV 13.5nm) but also much more complex and costly tools and materials. Key challenges such as improving photoresist etch resistance, addressing EUV mask defects, and enhancing light source efficiency remain central topics in the industry.
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