LPDDR is derived from DDR memory technology and serves as an energy-efficient alternative.
Low-Power Double Data Rate (LPDDR) is a high-performance, low-power memory designed specifically for mobile phones. Since its first release in 2006, each generation of LPDDR has provided the necessary bandwidth and capacity to significantly transform the mobile user experience. As the next wave of generative AI applications becomes integrated into our phones and laptops, LPDDR is once again at the forefront of another crucial transformation.
The key to on-device AI is efficient inference. The process of using trained AI models for predictions or decisions requires specialized memory technology with higher performance, tailored to the unique demands of end devices. On-device AI inference memory needs to strike an appropriate balance between bandwidth, capacity, power, and form factor compactness.
LPDDR evolved from DDR memory technology as an energy-efficient alternative. The advantage of LPDDR lies in its very low power consumption when the end device is not using memory. Due to its lower operating frequency, this low-power standard can easily and quickly adjust performance compared to DDR. LPDDR can enter a low-power state when the end device is not in use, significantly reducing power consumption. LPDDR5X is the fastest and most efficient version of the LPDDR standard to date.
Various applications and end devices require fast memory access to make real-time decisions:
- Smartphones and other mobile applications require high bandwidth and optimized power consumption, with the ability to adjust frequency based on device activity.
- Automotive processors support applications such as advanced driver assistance systems (ADAS). Most automotive applications use automotive-grade SDRAM, with standards stricter than those for traditional consumer products.
- AI accelerators, which are high-performance parallel computers, efficiently handle AI workloads such as neural networks.
- Edge AI requires fast, zero-latency data processing locally.
- Chips for cameras and video devices, TVs, routers, and other digital home products and media devices must perform rapid ultra-high-density (UHD) multimedia processing.
- 5G network devices require real-time data transmission to support fast data downloads and uploads.
LPDDR5 and the optional extended LPDDR5X are the latest updates to this standard.
The LPDDR5X standard, released by JEDEC in June 2021, is a specialized synchronous dynamic random-access memory (SDRAM). Compared to the previous LPDDR5 standard, LPDDR5X achieved improvements in several areas:
- Speed increased from 6.4Gbps to 8.5Gbps while maintaining a core voltage of 1.1V.
- Signal integrity was improved through receiver equalization and transmitter pre-emphasis technology.
- A new adaptive refresh management feature enhanced reliability.
- Battery efficiency improved by up to 20%.
LPDDR5X focuses on improving performance, power, and flexibility; it offers data rates up to 8.533Gbps, significantly increasing speed and performance. Compared to DDR5 memory, LPDDR5/5X limits the data bus width to 32 bits while increasing data rates. Switching to a quarter-rate clock instead of a half-rate clock in LPDDR4, along with a new feature—dynamic voltage frequency adjustment, keeps the higher data rate LPDDR5 operation within the same thermal budget as LPDDR4-based devices.
Considering the space constraints of mobile devices and the greater memory demands of advanced applications, LPDDR5X can support up to 64GB of capacity by using multiple DRAM chips in a multi-chip package. For example, the 7B LLaMa 2 model would consume 3.5GB of memory capacity if based on INT4. A x64 LPDDR5X package, with two LPDDR5X devices per package, provides a total bandwidth of 68GB/s, enabling the LLaMa 2 model to run inference at 19 tokens per second.
As the demand for higher memory performance continues to grow, we see LPDDR5 evolving in the market, with major suppliers announcing additional extensions to LPDDR5, called LPDDR5T, where T stands for turbo. LPDDR5T boosts performance to 9.6Gbps, achieving a total bandwidth of 76.8GB/s in multiple LPDDR5T stacks of x64 packages. Thus, the aforementioned 7B LLaMa 2 model example can run inference at 21 tokens per second.
LPDDR5, with its low power consumption and high bandwidth capabilities, is not only suitable for cutting-edge mobile devices but also for on-device AI inference, where energy efficiency and compact form factor are critical considerations. Rambus offers new LPDDR5T/5X/5 controller IP, fully optimized for applications requiring high memory throughput and low latency. The Rambus LPDDR5T/5X/5 controller supports cutting-edge LPDDR5T memory devices and all third-party LPDDR5 PHYs. It maximizes bus bandwidth and minimizes latency through advanced command processing, bank management, and auto-precharge. This controller can be delivered with additional cores, such as an in-line ECC or memory analyzer core, to enhance field reliability, availability, and serviceability (RAS).
With the increasing prevalence of bandwidth-intensive applications such as mobile communications, AI, and high-level autonomous driving, the demand for high-speed memory access will continue to grow. The cost-effective LPDDR5X SDRAM offers excellent speed, and considering the evolution of the LPDDR memory interface standard so far, its future development is limitless.
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