Chip design focuses more on energy efficiency! Arm discusses three key trends, challenges, and breakthroughs
Semiconductor IP leader Arm recently released the trend report “New Thinking on Chips: Laying the Foundation for the AI Era,” highlighting how AI drives chip design development, with a focus gradually shifting towards high-performance computing to address increasingly complex computational workloads. In the AI era, energy efficiency will be a key emphasis in chip design.
Arm pointed out that the AI era is redefining chip architecture and computing demands. Three major technological trends are currently emerging. First, the AI era is driving the development of high-performance computing. Secondly, the industry is widely adopting custom silicon chips, such as AWS Graviton4, Azure Cobalt, and Google Axion, all of which use Arm architecture. Trends like Computing Subsystems (CSS) and Chiplet technology are already evident. The former can accelerate time-to-market, while the latter paves the way for custom chips, helping new design methods achieve a better balance between power consumption, performance, and area (PPA).
Goldman Sachs research indicates that AI is expected to drive a 160% growth in data center power demand. As a result, chip designs must be optimized to suit different AI task characteristics, improving performance while reducing energy consumption. In AI computation, energy is primarily consumed at three levels: computation, data movement, and cooling.
From an industry trend perspective, there must be a stronger focus on energy efficiency, and smaller, more efficient generative AI applications suited for edge devices will emerge, such as medical diagnostics or local speech recognition applications. Arm pointed out that AI will also drive chip architecture innovation, with lower-level architectures like Arm’s SVE2 and SME being introduced. Arm is optimistic about the emergence of cloud and edge computing hybrid AI architectures, and edge AI computing will become increasingly widespread.
On the topic of information security, Arm’s application engineering director Xu Dayong believes that the future will be “AI fighting AI.” As such, SoC chips must add security features, such as enhanced encryption mechanisms. He mentioned that Arm’s confidential computing architecture (CCA) ensures that AI models, while operating, maintain data and algorithms from being tampered with or stolen.
Arm also sees AI driving a complete restructuring of chip design, spanning across architecture, collaboration, and standard setting. Due to the complexity of chip design, IP suppliers, foundries, packaging factories, and system integrators must collaborate more closely. Designs must shift to a system-level approach, not just individual components, with overall optimization covering computation, memory, heat dissipation, and power supply. At the same time, the industry must establish new standards to support small chip interfaces, power supply, and thermal management, ultimately achieving truly modular chip designs. Different workloads will increasingly require specialized architectures, leading to more diverse types of chip designs, with energy efficiency being the core metric in every step, from architecture to implementation.
Finally, Arm stated that the current challenges in software and chip integration include issues such as the high cost and time required to deploy onto customized hardware, a lack of standardized AI development processes, and interoperability between AI frameworks. These are key challenges faced by developers, and thus universal tools and standardization will be critical breakthrough points.
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