The Semiconductor package can be divided into PTH (PIN-through-hole) package and SMT (surface-mount-technology) package according to the layout of package pins, chip and PCB connection mode, and the time sequence of development. Commonly known as jack type (or through-hole type) and surface mount type.
PTH (Pin Through Hole)
Pin Through Hole package, as the name implies, is the use of insert in the process of chip and target board connection, ancient and classic DIP packaging is this type of package. In the early integrated circuit, because the chip integration is not high, the chip work required fewer input/output pins, so the package form is mostly adopted. DIP packages are available in two derivative forms, NAMELY SIP and ZIP, with a slight modification of the pin layout and shape of the traditional DIP package for different applications.
SMT (Surface-Mount Technology)
The advantages of the PTH package in mechanical connection strength are undeniable, but it also brings some negative effects. The through-hole used in the PTH package will occupy a large amount of PCB board effective wiring area, so the current mainstream PCB board design mostly uses a surface mount package.
There are many types of surface-mount package, commonly used package forms are:
- Small Outline Transistor (SOT)
- Small Outline Package (SOP)
- Quad Flat No-lead Package (QFN)
- Thin Small Shrink Outline Package (TSSOP)
- Quad Flat Package (QFP)
- Square Flat Pin Less Package (QFN)
From SOT to QFN, the chip package shell supports more and more pins, and the pipe Angle spacing of the chip package shell becomes smaller and smaller.
The advantages of the surface-mount packages are that the size of the chip package is greatly reduced, and the pin density of the chip package is greatly increased. When the number of pins is the same as that of the PTH package, the size of the surface mount packaging is much smaller than that of the PTH package. The Surface mount package only occupies the surface wiring space of the PCB board. When using a multi-layer wiring process, the effective wiring area occupied by the package is greatly reduced, which can greatly improve the PCB wiring density and utilization rate.
BGA (Ball Grid Array)
In order to realize more complex functions, the number of input/output pins required by the chip is also further increased. Facing the increasing number of pins and the decreasing size of the chip package, a new type of BGA package is proposed for the microelectronics package.
At the bottom of THE BGA package, the pin is made in a matrix way, and the pin is spherical in shape. The chip is assembled on the front of the package shell, and sometimes the BGA chip and the spherical pin are placed on the same side of the substrate. BGA packaging is a common package form of large-scale integrated circuits. BGA packages can be divided into three categories: plastic BGA, ceramic BGA, and carrier BGA according to the different materials of the package shell base plate.
BGA package has the following common characteristics:
- The failure rate of the chip packages is low.
- The ratio of the number of pins to the size of the package shell is increased, and the substrate area is reduced.
- Pin coplanar good, reduce pin coplanar damage caused by poor welding;
- BGA pin is solder value ball, there is no pin deformation problem;
- The BGA package pin is shorter, the input/output signal link is greatly shortened, the resistance/capacitance/inductance effect introduced by the length of the pin is reduced, and the parasitic parameters of the package are improved.
- BGA ball grid array and PCB have more contact points and larger contact area, which is conducive to chip heat dissipation. BGA package is beneficial to improve the package density.
BGA package uses pin arrangement in matrix form. Compared with the traditional mount package, the package size of BGA packaging can be smaller with the same pin number, and also saves the wiring area of the PCB board.
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