The purpose of the microchip test is to get a quick idea of its body composition.
Large companies have tens of thousands of chips flowing daily, and the pressure of testing is very high. Once the chip is produced by the fab, it enters the Wafer Test stage. This phase of testing may be performed in the fab, or it may be sent to a nearby test vendor’s agent to perform.
The production engineer will use the Automatic Test Equipment (ATE) to run the program given by the chip designer and roughly divide the chips into good/bad parts, the bad ones will be discarded directly. If the yield rate is low below a certain value, the foundry needs to lose money.
After passing the Wafer Test, the wafers are diced. The diced chips are sorted according to the previous results. Only the good chips are sent to the packaging facility for packaging. The packaging location is usually near the wafer fab because unpackaged chips cannot be transported over long distances. The type of packaging depends on the customer’s needs, some require spherical BGAs, some require pins, but all in all, this is a very simple step with fewer failures. Since the success rate of packaging is much higher than the production yield of the chip, it is not tested after packaging.
After packaging, the chip is sent to the test facility, also called the production facility, of each company. There are actually more than a dozen processes in the production factory, and Final Test is only the first step. After the Final Test, there are also steps such as sorting, marking, checking the package, and packaging. Then it can be shipped to the market.
Final Test is the main focus of the factory and requires a lot of machinery and equipment. Its purpose is to strictly classify the chips. In the case of Intel's Soc, these phenomena can occur in Final Test:
- Although it passed the Wafer Test, the chip is still bad.
- Packaging damage.
- The chip is partially damaged. For example, the CPU has 2 cores damaged, the GPU is damaged, the display interface is damaged, etc.
- The chip is good, with no faults.
At this point, engineers need to work with the marketing department to decide how to classify these chips. For example, if the GPU is broken, it is treated as a “Celeron” series processor without a display core. For example, a CPU with two broken CPUs is treated as a “Core i3” series processor. If the chip is working properly, but the operating frequency is not high, it is treated as a “Core i5” series processor. No problem at all, as the “Core i7” processor.
What should we do for the Final Test here?
The Final Test can be divided into two steps:
- Automatic Test Equipment (ATE).
- System-Level Testing (SLT).
No. 2 is a necessary item. No. 1 generally small companies can not afford to use it.
The ATE test typically takes a few seconds, while the SLT takes several hours. The presence of ATE greatly reduces the chip testing time.
ATE is responsible for a very large number of projects, and there is a strong logical connection. Testing must be done in order, for the first test results, the second test items may be skipped. The contents of these projects are confidential, I will only list a few: such as power supply detection, pin DC detection, test logic circuit (usually JTAG) detection, high voltage baking chip, physical connection layer PHY detection, IP internal detection (including Scan, BIST, Function, etc.), IP IO detection (such as DDR, SATA, PLL, PCI-E, Display, etc.), auxiliary function detection (e.g. thermodynamic characteristics, fusing, etc.).
These test items will give a Pass/Fail, according to these Pass/Fail analyzing the chip’s body, is the test engineer’s job.
SLT is logically simpler, install the chip on the motherboard, configure the memory, and peripherals, boot an operating system, and then test it with a software bakeout and record the results for comparison. In addition, you have to check BIOS-related items, etc.
